Photonic Computing
Computing at the Speed of Light

What Is Photonic Computing?

Photonic computing is an approach to information processing that uses photons — particles of light — rather than electrons to carry and manipulate data. While electronic computing relies on transistors switching electrical currents on and off, photonic computing exploits the physical properties of light: its speed (300,000 km/s in vacuum), its ability to carry multiple signals simultaneously on different wavelengths (wavelength-division multiplexing), and the near-zero energy cost of propagating photons through a transparent medium.

Two branches of photonic technology

It is critical to distinguish between two related but fundamentally different applications:

• Photonic interconnects: Using light to transport data between chips, boards, racks, or datacenters. Data is computed electronically, converted to optical signals for transmission, then converted back. This is mature, deployed technology — every long-haul datacenter network has used fiber optics for decades, and the frontier is pushing optics closer to the chip itself.
• Photonic computing: Using light to perform mathematical operations — matrix multiplications, Fourier transforms, convolutions — in the optical domain. Inputs are encoded as light intensities or phases, processed through optical circuits, and the results are read at photodetectors. This is emerging technology, with first commercial products arriving in 2025-2027.

Silicon Photonics Fundamentals

Silicon photonics is the technology that makes practical photonic computing possible. It fabricates optical components — the photonic equivalents of transistors, wires, and switches — directly on silicon wafers using conventional CMOS manufacturing processes. This compatibility with existing semiconductor fabs is what separates silicon photonics from exotic optical technologies that require specialized materials and processes.

Core components

Every silicon photonics circuit is built from four fundamental building blocks:

• Waveguides: Thin silicon strips (typically 220nm thick, 450-500nm wide) that confine and guide light using total internal reflection. Silicon's high refractive index (n=3.48 at 1550nm) relative to the surrounding silicon dioxide cladding (n=1.44) creates strong optical confinement, enabling waveguides with bend radii as small as 5 micrometers — dense enough for millions of optical paths on a single chip.
• Modulators: Devices that encode electronic data onto light by rapidly changing the optical properties of a waveguide. The most common type — the Mach-Zehnder interferometer (MZI) modulator — splits light into two paths, applies a phase shift to one via carrier injection/depletion in a p-n junction, then recombines them. Constructive or destructive interference produces a "1" or "0." Modern MZI modulators operate at 100+ Gbaud.
• Photodetectors: Germanium-on-silicon photodiodes that convert optical signals back to electrical current. Germanium absorbs light at the 1310nm and 1550nm wavelengths used in telecommunications. Integrated Ge photodetectors achieve responsivities of 0.8-1.1 A/W at bandwidths exceeding 50 GHz.
• Multiplexers/Demultiplexers: Arrayed waveguide gratings (AWGs) or ring resonator filters that combine or separate multiple wavelengths onto a single waveguide — wavelength-division multiplexing (WDM). A single fiber can carry 16, 32, or more independent data channels simultaneously, multiplying bandwidth without additional waveguides.

Light sources

Silicon itself is a poor light emitter due to its indirect bandgap. Laser sources are typically external — III-V semiconductor lasers (InP, GaAs) coupled to the silicon chip via edge coupling or grating couplers. Intel and others have demonstrated hybrid III-V/silicon lasers bonded directly onto the silicon photonics die, enabling fully integrated optical transceivers.

Why Light? Optical vs Electronic Interconnects

The argument for photonic interconnects is rooted in physics, not marketing. As electronic interconnect bandwidths scale, power consumption grows superlinearly — doubling copper bandwidth more than doubles the energy cost. Optical links break this relationship.

The critical metric is energy per bit. At the chip-to-chip scale, copper SerDes links in 2026 consume 5-10 pJ/bit at 112 Gbps PAM4. Silicon photonic links achieve 1-2 pJ/bit at equivalent or higher data rates. When an AI training cluster moves exabytes of data per day between GPUs, this 5-10x energy reduction translates directly to megawatts of saved power — and millions of dollars annually in electricity costs.

Optical Computing for AI: How Photonic Chips Process Neural Networks

Beyond data transport, a more ambitious application of photonics is performing the actual computations of neural network inference in the optical domain. This is possible because the core operation of neural networks — matrix-vector multiplication (MVM) — maps naturally onto the physics of light.

How optical matrix multiplication works

A photonic neural network processor encodes input data as the intensities or phases of light beams entering an array of Mach-Zehnder interferometers (MZIs). Each MZI acts as a programmable optical element — its phase shifters set the equivalent of a neural network weight. As light propagates through the MZI mesh, the interference patterns between beams perform the multiply-and-accumulate operations of matrix multiplication.

The result is read at an array of photodetectors. The entire matrix-vector multiplication happens in a single pass through the optical circuit — at the speed of light, with energy consumption dominated by the photodetectors and phase shifters rather than the computation itself.

Performance advantages

• Speed: Optical MVM completes in the propagation time of light through the chip — typically under 1 nanosecond for a 64x64 matrix. Electronic equivalents require hundreds of clock cycles.
• Energy efficiency: The computation itself is essentially free in energy terms — photons propagating through passive waveguides dissipate no heat. Total system energy (including lasers, modulators, detectors, and digital control) achieves 0.1-1 TOPS/W in current prototypes, with theoretical limits exceeding 100 TOPS/W.
• Analog parallelism: WDM enables multiple independent computations on different wavelengths simultaneously through the same physical hardware, multiplying throughput linearly.

Current limitations of photonic AI

• Analog precision: Optical computation is inherently analog. Current photonic processors achieve 4-8 bit effective precision — sufficient for inference but inadequate for training, which typically requires FP16 or higher.
• Nonlinear operations: Neural networks require nonlinear activation functions (ReLU, GELU) between matrix multiplications. Optical nonlinearities are weak in silicon; current systems convert back to electrical domain for activation functions, adding latency and power overhead.
• Matrix size: MZI meshes scale as O(N^2) in physical area for an NxN matrix. Current chips support 64x64 to 128x128 matrices. Larger neural network layers must be tiled, reducing the speed advantage.

Key Players in Photonic Computing

Lightmatter

Lightmatter is the most prominent photonic AI compute company, having raised over $400 million. Its product line spans two categories: Envise, a photonic AI inference accelerator that performs matrix multiplications in the optical domain using programmable MZI meshes; and Passage, a wafer-scale photonic interconnect fabric that connects multiple chiplets with terabits per second of optical bandwidth at sub-picojoule-per-bit energy. Passage is particularly significant — it enables "disaggregated" chip architectures where compute, memory, and I/O chiplets communicate optically rather than over power-hungry copper traces.

Ayar Labs

Ayar Labs focuses specifically on optical I/O chiplets — replacing the electrical SerDes interfaces on processors with silicon photonic transceivers. Its TeraPHY optical I/O chiplet delivers 2+ Tbps of bandwidth in a compact package that plugs into a multi-chip module alongside conventional compute dies. Ayar Labs has partnerships with Intel (integrating TeraPHY with Intel processors) and has received DARPA funding. The value proposition is clear: swap out copper I/O for optical I/O without redesigning the compute die itself.

Intel Silicon Photonics

Intel operates the largest silicon photonics fab in the world and has shipped millions of 100G/400G optical transceivers. Intel's approach is fully monolithic — integrating lasers, modulators, waveguides, and photodetectors on a single silicon die. In 2026, Intel is producing 800G DR8 modules and developing 1.6T solutions. Intel's scale advantage in silicon photonics manufacturing is significant: by using its existing fab infrastructure, Intel achieves cost structures that smaller photonics startups cannot match.

Co-Packaged Optics: Bringing Light Inside the Chip Package

Co-packaged optics (CPO) represents the next major step in pushing optical interconnects closer to the processor. Instead of plugging external optical modules into the front panel of a switch or server, CPO integrates optical engines directly into the same package as the electronic chip — millimeters from the compute die rather than centimeters away on the PCB.

Why CPO matters

Current 51.2 Tbps switch ASICs (e.g., Broadcom Tomahawk 5) need 64 ports of 800G optics — 64 pluggable modules consuming ~15W each, totaling nearly 1,000W just for optical transceivers, plus the switch ASIC's own ~500W. The electrical traces from the ASIC to the front-panel modules traverse centimeters of PCB, requiring power-hungry electrical retimers.

CPO eliminates the long electrical path. By placing the optical engine inside the package, the electrical link from the ASIC to the modulator shrinks to millimeters. This enables:

• 30-50% power reduction in the I/O path compared to pluggable optics
• Higher bandwidth density: No front-panel faceplate constraint; bandwidth scales with package area
• Lower latency: Shorter electrical paths and elimination of retimer stages
• Enablement of 102.4T and 204.8T switches: Pluggable optics physically cannot scale to the port densities required for next-generation networking

Photonic Computing Challenges

For all its promise, photonic computing faces significant technical and practical hurdles that explain why electronics still dominates.

Manufacturing challenges

• Thermal sensitivity: Silicon's refractive index changes with temperature (~1.86 x 10^-4 per Kelvin). A 1-degree temperature fluctuation shifts ring resonator wavelengths by ~0.1 nm, enough to degrade performance. Active thermal tuning consumes power and adds complexity.
• Laser integration: Silicon cannot efficiently emit light. External laser sources or heterogeneously integrated III-V lasers add manufacturing steps, cost, and failure modes that pure CMOS processes avoid.
• Yield and defect density: Photonic components require nanometer-scale precision in waveguide dimensions. A 1 nm variation in waveguide width causes measurable phase errors in MZI meshes. At wafer scale, achieving the uniformity required for large photonic circuits remains challenging.

Architectural limitations

• No optical memory: There is no photonic equivalent of SRAM or DRAM. Data cannot be stored optically for any practical duration. Every photonic processor requires electronic memory and electronic-optical conversions at input and output boundaries.
• Weak nonlinearity: Digital electronics can implement arbitrary logic because transistors provide strong, fast switching nonlinearity. Optical nonlinear effects in silicon (Kerr effect, two-photon absorption) are weak and power-hungry. General-purpose photonic computing would require strong, efficient, fast optical nonlinearities that do not yet exist.
• Footprint: Optical components are physically large compared to transistors. A single MZI is ~200 micrometers long. A 128x128 MZI mesh occupies several square millimeters — area that could hold billions of transistors.

Datacenter Optical Interconnects

While photonic computing grabs headlines, the most impactful near-term application of silicon photonics is datacenter optical interconnects. AI training clusters are pushing the limits of electronic interconnects, and optics is the only viable solution for next-generation bandwidth requirements.

The AI bandwidth demand

Training a frontier AI model in 2026 requires clusters of 10,000-100,000 GPUs interconnected with all-to-all communication patterns. NVIDIA's GB200 NVL72 rack connects 72 GPUs with 130 TB/s of total bisection bandwidth. Scaling to 100,000 GPUs requires spine-leaf network fabrics with aggregate bandwidths measured in petabits per second — far beyond what copper-based solutions can deliver.

Linear-drive optics

A parallel trend is linear-drive optics (LDO) — eliminating the power-hungry DSP (digital signal processing) chip inside optical modules. Traditional pluggable modules use a DSP to clean up the electrical signal before modulating it onto light. LDO connects the switch ASIC's SerDes output directly to the optical modulator, saving 3-5W per port. LDO is a stepping stone toward CPO, reducing power consumption while maintaining the pluggable form factor.

The Future of Photonic Computing

2027-2030 trajectory

• CPO becomes mainstream: By 2028, the majority of hyperscaler switch deployments will use co-packaged optics. The 102.4T switch generation will be the inflection point — pluggable optics physically cannot provide enough ports in a standard rack unit.
• Optical I/O chiplets in AI accelerators: Ayar Labs and Intel are integrating optical I/O directly into GPU and AI accelerator packages. By 2027-2028, next-generation AI training accelerators will ship with optical rather than copper SerDes I/O, enabling direct optical GPU-to-GPU connections.
• Photonic AI inference at scale: Lightmatter's Passage interconnect and Envise compute products will mature into production-grade systems. Initial deployments will focus on specific inference workloads — recommendation models, embedding generation, transformer attention — where photonic matrix multiplication's energy efficiency offers the greatest advantage.
• Photonic quantum computing: Xanadu and PsiQuantum are building photonic quantum computers that use squeezed-light states as qubits. Photonic qubits operate at room temperature (unlike superconducting qubits) and can be manufactured in existing silicon photonics fabs. By 2030, photonic quantum processors may achieve error-corrected logical qubits.
• On-chip optical interconnects: The long-term frontier is replacing copper wires inside the processor itself with optical waveguides. Research from MIT, IBM, and IMEC demonstrates on-chip optical links, but production deployment is a decade away due to the E/O conversion overhead at millimeter scales.

The photonic-electronic convergence

The future is not photonic or electronic computing — it is photonic and electronic computing, tightly integrated on the same platform. Electronic transistors will continue to handle logic, control flow, and memory. Photonic circuits will handle data movement (interconnects) and linear algebra (AI inference). The integration boundary is moving steadily closer to the compute die: from datacenter fiber, to rack-level optics, to board-level, to package-level (CPO), and eventually to die-level optical interconnects.

The companies that master this integration — building hybrid electronic-photonic platforms where electrons and photons each do what they do best — will define the next era of computing performance.

Frequently Asked Questions

Conclusion

Photonic computing stands at a pivotal moment. Silicon photonics has matured from a research curiosity to a volume manufacturing technology shipping millions of optical transceivers annually. Co-packaged optics is poised to transform datacenter networking within two years. And photonic AI accelerators are transitioning from laboratory demonstrations to first commercial deployments.

The semiconductor industry's energy crisis — where data movement consumes more power than computation — is photonics' strongest argument. As AI training clusters grow from thousands to hundreds of thousands of accelerators, the physics of copper interconnects simply cannot keep up. Light can. The question is no longer whether photonics will become essential to computing, but how quickly the integration of photonic and electronic systems will proceed.