The Scale of the Problem
A single advanced semiconductor fab consumes resources at an industrial scale that's hard to appreciate until you see the numbers. TSMC's Fab 18 in Tainan — one of their 5nm/3nm production facilities — uses about 156,000 tons of water per day. That's roughly equivalent to the daily water consumption of a city of 60,000 people. The fab's electricity consumption is around 900 GWh per year, comparable to a small city's entire power grid.
And that's one fab. TSMC operates over 10 advanced fabs in Taiwan alone, plus facilities in China, Japan, and the US. Samsung, Intel, and the memory makers operate comparable facilities. The global semiconductor industry's total energy consumption is estimated at 75-100 TWh per year — about 0.3% of global electricity production, and growing as chips require more processing steps at advanced nodes.
Water: The Silent Dependency
Semiconductor manufacturing requires ultrapure water (UPW) — water purified to a resistivity of 18.2 MΩ·cm, essentially free of all dissolved minerals, organic compounds, and particles. UPW is used for wafer rinsing after chemical processes, and a single 300mm wafer goes through hundreds of rinse steps during production. The consumption is staggering: 7,000-10,000 gallons of UPW per wafer at advanced nodes.
Producing UPW from municipal water requires its own industrial process — reverse osmosis, deionization, UV treatment, and continuous recirculation. The conversion ratio is roughly 1.4-1.6 gallons of municipal water for every gallon of UPW, meaning the total water footprint is even larger than the UPW consumption suggests.
Taiwan's semiconductor industry concentrates this water demand in a drought-prone region. The 2021 Taiwan drought forced TSMC to truck in water to keep fabs running — hundreds of tanker trucks per day at peak. The incident highlighted how vulnerable advanced chip manufacturing is to water supply disruptions.
Water Recycling Efforts
The industry has made genuine progress on water recycling. TSMC reports a water recycling rate of about 86% — meaning 86% of the water used in the fab is treated and reused. Intel's Oregon facility claims over 80% recycling. Samsung's Austin fab has achieved similar rates.
This connects to the ideas in Automotive Chip Requirements: ISO 26262, Temperature Ranges,.
But "recycling rate" can be misleading. Some water uses — cooling tower evaporation, for instance — can't be recycled because the water leaves the system as vapor. The actual reduction in freshwater consumption per wafer is real but doesn't eliminate the fundamental dependency on large water supplies.
New fabs being built under the CHIPS Act have ambitious water targets. TSMC's Arizona facility is designed around an on-site water recycling facility that targets 90%+ recycling rates. Intel's Ohio facility includes a dedicated reclaimed water pipeline from the local wastewater treatment plant. These investments add cost but address what's becoming a real constraint on fab siting decisions.
Energy Consumption and Carbon Footprint
The energy intensity of semiconductor manufacturing increases with each process generation. A 3nm fab uses roughly 30% more energy per wafer than a 7nm fab, primarily because of additional process steps (more lithography passes, more deposition and etch cycles) and the energy-hungry EUV lithography scanners.
An ASML EUV scanner consumes about 1 MW of electrical power during operation — and it converts only about 6% of that into useful EUV light. The rest becomes heat that has to be removed by the fab's cooling systems, which consume additional energy. A fab with 15-20 EUV scanners has a significant fraction of its total power budget going to lithography alone.
The industry's carbon footprint includes both electricity consumption and direct emissions from process gases. Several gases used in semiconductor manufacturing are potent greenhouse gases:
This connects to the ideas in Semiconductor Fabrication Step by Step: From Silicon Ingot t.
- CF₄ (carbon tetrafluoride) — used in plasma etching, has a global warming potential (GWP) of 6,630× CO₂ and an atmospheric lifetime of 50,000 years
- SF₆ (sulfur hexafluoride) — used in etching, GWP of 23,500×
- NF₃ (nitrogen trifluoride) — used in chamber cleaning, GWP of 17,200×
- C₂F₆ (hexafluoroethane) — used in etching, GWP of 12,200×
Point-of-use abatement systems destroy 90-99% of these gases before they reach the atmosphere, but the remaining 1-10% is still significant given the volumes used. TSMC reports Scope 1 and 2 emissions of about 10 million metric tons CO₂-equivalent per year. Samsung Semiconductor's emissions are comparable.
Chemical Waste and Hazardous Materials
A modern fab uses over 500 different chemicals — acids, solvents, photoresists, metal precursors, dopant gases, CMP slurries, and specialty cleaning formulations. Many are hazardous: hydrofluoric acid (extremely corrosive and acutely toxic), arsine and phosphine (toxic gases used for doping), organic solvents like NMP and PGMEA (reproductive toxins), and various heavy metal compounds.
Waste treatment is a significant operational challenge. Every fab has its own wastewater treatment facility that handles multiple waste streams — acid waste, fluoride-containing waste, organic solvent waste, CMP slurry waste, heavy metal waste — each requiring different treatment processes. The treated water must meet stringent discharge standards before release.
PFAS (per- and polyfluoroalkyl substances) are an emerging concern. These "forever chemicals" are used in photoresists, anti-reflective coatings, and some cleaning processes. They're extremely persistent in the environment and are becoming subject to increasingly strict regulation in the EU and US. The semiconductor industry is one of the last remaining users of some PFAS compounds and is under pressure to find alternatives, but replacement chemistry that meets the extreme purity and performance requirements of advanced manufacturing is still being developed.
Industry Sustainability Initiatives
To their credit, the major semiconductor companies have set ambitious sustainability targets:
For a related perspective, see HBM4 Memory Technology: Architecture, Bandwidth, and the AI .
- TSMC: net-zero emissions by 2050, 100% renewable energy for operations by 2050
- Intel: net-zero Scope 1 and 2 emissions by 2040, 100% renewable electricity by 2030
- Samsung: net-zero by 2050 for the Device Solutions division
- ASML: net-zero by 2040 for their own operations
Renewable energy procurement is the most straightforward path. Intel already purchases 100% renewable electricity for its US and European operations through power purchase agreements (PPAs) with wind and solar farms. TSMC has been signing major solar and offshore wind PPAs in Taiwan. The challenge is in regions where renewable energy infrastructure isn't sufficient — you can't run a 1 GW fab on intermittent solar without massive energy storage or grid backup.
The Tension Between Growth and Sustainability
Here's the uncomfortable truth: semiconductor manufacturing is growing, and with it, its environmental footprint. The CHIPS Act and equivalents worldwide are adding significant new fab capacity. AI training and inference require enormous computing resources, driving demand for more chips. Even if each wafer's environmental impact decreases (which it hasn't been, at advanced nodes), the total number of wafers processed is increasing faster.
The industry's sustainability goals are laudable but face real physics constraints. You can't etch silicon dioxide without fluorine-based gases. You can't clean wafers without ultrapure water. You can't power EUV scanners with anything less than megawatts of electricity. Efficiency improvements help at the margin, but the fundamental resource intensity of turning sand into chips isn't going away.
What can change is the source of those resources — renewable electricity instead of fossil fuels, recycled water instead of freshwater, alternative chemistries where possible, and better abatement for process gases. The question is whether the industry invests enough in these transitions to keep its environmental footprint from growing proportionally with production volume. So far, the trajectory is improving on a per-wafer basis but not in absolute terms.