CMOS Image Sensors: Capturing Light at the Pixel Level
Every smartphone camera, security camera, and automotive vision system uses a CMOS image sensor (CIS) to convert photons into electrical signals. The global CIS market is worth about $25 billion annually, dominated by Sony Semiconductor Solutions (roughly 44% market share), Samsung (about 25%), and OmniVision (around 12%).
The fundamental sensing element is the photodiode — a reverse-biased p-n junction that generates current proportional to incident light. Each pixel contains a photodiode plus readout transistors. In the standard 4T (four-transistor) pixel architecture, you have: a transfer gate that moves collected charge from the photodiode to a floating diffusion node, a reset transistor, a source-follower amplifier, and a row-select transistor. The 4T design enables correlated double sampling (CDS), which subtracts reset noise and dramatically improves signal-to-noise ratio.
Pixel Shrinking and the Backside Illumination Revolution
Smartphone cameras have driven pixel size from 5.6 µm (circa 2005) down to 0.56 µm in Samsung's latest 200MP sensors. That's a 100× reduction in pixel area, which seems like it should destroy image quality. It didn't, largely because of backside illumination (BSI).
In traditional front-side illumination (FSI), light has to pass through the metal wiring layers above the photodiode before reaching the silicon. At large pixel sizes, this wasn't a big deal because the fill factor — the fraction of pixel area that's actually light-sensitive — was high enough. But as pixels shrank, the metal wires blocked an increasing fraction of incoming light.
BSI flips the sensor upside down. The silicon wafer is thinned to about 3 µm and bonded to a carrier wafer, then the light enters from the back side where there are no wiring layers. Fill factor approaches 100%, and the quantum efficiency (photons converted to electrons) improved from 30-40% for FSI to 70-80% for BSI at visible wavelengths.
Sony pioneered mass production of BSI sensors around 2009 and it's now the standard for essentially all smartphone and high-end camera sensors.
For a related perspective, see AI Chip 2026: NVIDIA B200 vs AMD MI455X vs Gaudi 3.
Stacked Sensor Architecture
Sony's next innovation was the stacked sensor, introduced in 2012 with the IMX135. The pixel array sits on a top chip, the readout circuitry and ADCs sit on a bottom chip, and they're bonded together face-to-face. This architecture has two major benefits: the logic chip can use a more advanced process node (for faster, lower-power readout) independently of the pixel process, and the total sensor footprint is smaller because the circuitry is underneath the pixels rather than beside them.
The latest generation goes further with three-layer stacking — pixels on top, DRAM in the middle, and logic on the bottom. Sony's IMX989 (used in the Xiaomi 13 Ultra) uses this approach. The embedded DRAM enables readout of all pixels simultaneously, which eliminates rolling shutter distortion in fast-moving scenes.
LiDAR Receivers: Counting Individual Photons
Light Detection and Ranging (LiDAR) sensors measure distance by timing the round-trip of laser pulses. The receiver chip needs to detect very faint return signals — sometimes just a handful of photons — and timestamp them with sub-nanosecond precision. Two main detector technologies compete for this job.
Avalanche photodiodes (APDs) operate with a reverse bias just below the breakdown voltage. When a photon generates an electron-hole pair, the high electric field causes avalanche multiplication, amplifying the signal by a factor of 10-100. APDs are used in many automotive LiDAR systems where moderate sensitivity and linear response are needed.
Single-photon avalanche diodes (SPADs) operate above the breakdown voltage. A single photon triggers a self-sustaining avalanche that produces a large digital-like output pulse. SPADs can literally detect individual photons, making them ideal for long-range LiDAR where return signals are extremely weak. The tradeoff is dead time — after firing, the SPAD needs time to quench and recharge, limiting the maximum count rate.
Related reading: SRAM Cell Design: Bitcell Scaling, Read Stability, and Embed.
SPAD arrays for LiDAR are manufactured in standard CMOS processes, which means you can integrate the detector array with timing electronics (time-to-digital converters), histogramming logic, and digital processing on the same chip. Companies like STMicroelectronics, ams-OSRAM, and Sony are producing SPAD-based LiDAR sensors with hundreds of thousands of pixels.
Direct Time-of-Flight vs. Flash LiDAR
Most automotive LiDAR systems use scanning architectures — a laser sweeps across the scene while a small detector or detector array captures returns. But there's growing interest in flash LiDAR, which illuminates the entire scene at once and uses a large SPAD array to capture a complete depth image in a single pulse.
Flash LiDAR is mechanically simpler (no scanning mirrors) and can capture a full frame at very high rates. The challenge is power — illuminating a wide field of view at sufficient intensity for long-range detection requires very powerful laser pulses. Continental's flash LiDAR uses a 905nm VCSEL array delivering kilowatt-level peak optical power in nanosecond pulses.
MEMS Sensors: Mechanical Structures on Silicon
Microelectromechanical systems (MEMS) integrate mechanical structures — cantilevers, membranes, proof masses — onto a silicon die, creating sensors and actuators that are manufactured using semiconductor processes. The MEMS market spans accelerometers, gyroscopes, pressure sensors, microphones, and RF filters.
A MEMS accelerometer works by measuring the displacement of a proof mass suspended by microscopic silicon springs. When the device accelerates, the proof mass's inertia causes it to shift relative to the frame, and capacitive sensing plates detect this displacement. The capacitance change is typically a few femtofarads — buried in a background of hundreds of femtofarads from parasitics. Extracting that signal requires careful analog design.
This connects to the ideas in Emerging Memory Technologies: MRAM, ReRAM, and Processing-in.
The big players in MEMS are STMicroelectronics, Bosch Sensortec, TDK InvenSense, and Analog Devices. Bosch is the MEMS giant for automotive applications, producing over a billion MEMS sensors per year across accelerometers, gyroscopes, pressure sensors, and gas sensors.
MEMS-CMOS Integration
There are two main approaches to combining MEMS structures with their CMOS readout electronics:
- Monolithic integration — MEMS and CMOS are built on the same wafer. This minimizes parasitics and package size but constrains both the MEMS and CMOS processes (since they share a wafer flow).
- Heterogeneous integration — MEMS and CMOS are manufactured on separate wafers and bonded together. This allows each to use an optimal process. Most modern high-performance MEMS use this approach, with wafer-level bonding (eutectic, fusion, or glass frit) creating a hermetic cavity over the MEMS structures.
The hermetic seal is critical. MEMS structures operate in a controlled atmosphere — often a specific pressure of nitrogen or a partial vacuum. A gyroscope needs low pressure to minimize air damping on its resonating structure. An accelerometer might need a specific gas pressure for damping to avoid ringing. If the seal leaks, the sensor's performance degrades over time.
Sensor Fusion and the Role of the Processing Hub
Modern devices don't use individual sensors in isolation. A smartphone's inertial measurement unit (IMU) combines a 3-axis accelerometer, 3-axis gyroscope, and sometimes a 3-axis magnetometer, fusing their outputs to determine orientation and motion. Bosch's BMI323 integrates accelerometer and gyroscope in a single 2.5mm × 3.0mm package with built-in sensor fusion algorithms.
In automotive applications, sensor fusion is even more critical. A self-driving car's perception system might combine data from 8+ cameras, 4-5 radar sensors, and 1-2 LiDAR units. The fusion happens on a dedicated processor — NVIDIA's Orin or Mobileye's EyeQ — but the sensor chips increasingly include preprocessing to reduce the data bandwidth flowing to the central processor.
This trend toward intelligent sensors — putting more computation at the sensor itself — is blurring the line between sensor chips and application processors. It's honestly one of the more interesting architectural questions in semiconductor design right now: how much processing do you put at the edge of the system versus centralizing it?